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OCZ OCZ2VU8004GK - memory modules specifications.

  Memory modules Specs >> OCZ >> OCZ OCZ2VU8004GK


Basic Specs OCZ OCZ2VU8004GK
Memory type:
DDR2 DDR2 SDRAM is a double data rate synchronous dynamic random-access memory interface. It superseded the original DDR SDRAM specification, and is superseded by DDR3 SDRAM (launched in 2007). DDR2 DIMMs are neither forward compatible with DDR3 nor backward compatible with DDR.
Form factor:
DIMM 240-pin
Clock frequency:
800 MHz
Bandwidth:
6400 MB/s
Volume:
2 module 2 GB
ECC support: Usually, the motherboard must match the memory type; as a result, registered memory will not work in a motherboard not designed for it, and vice versa. Some PC motherboards accept or require registered memory, but registered and unregistered memory modules cannot be mixed. There is much confusion between registered and ECC memory; it is widely thought that ECC memory (which may or may not be registered) will not work at all in a motherboard without ECC support, not even without providing the ECC functionality, although the compatibility issues actually arise when trying to use registered memory (which also supports ECC and is described as ECC RAM) in a PC motherboard that does not support it.
no
UN-Buffered Memory (Registered):
no
Low Profile Bracket (Low Profile):
no
Timings OCZ OCZ2VU8004GK
CAS Latency (CL): Latency is the time the memory controller must wait between requesting data and the actual delivery of them. It is also known as CAS (Column Address Strobe) Latency or simply CL. This number is expressed in terms of clock cycles.
5
RAS to CAS Delay (tRCD): The number of clock cycles required between the opening of a row of memory and accessing columns within it. The time to read the first bit of memory from a DRAM without an active row is TRCD + CL.
6
Row Precharge Delay (tRP): The number of clock cycles required between the issuing of the precharge command and opening the next row. The time to read the first bit of memory from a DRAM with the wrong row open is TRP + TRCD + CL.
6
Activate to Precharge Delay (tRAS): The number of clock cycles required between a row active command and issuing the precharge command. This is the time needed to internally refresh the row, and overlapping with TRCD. In SDRAM modules, it is simply TRCD + CL. Otherwise, approximately equal to TRCD + (2 * CL).
15
Detailed Specs OCZ OCZ2VU8004GK
Supply voltage:
1.8 In
Radiator:
yes
Additional information:
supply voltage of 1.8-2.0

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